PICAXE & Philips EE: Two-wire "SerialPower" Network

Version V2.0 (September 2007)

This page presents information on a true two-wire network between intelligent PICAXE-powered network nodes. The network has the following aspects:

A more detailed summary of features is given at the end of this page.

Version V2.0 is a significant update of V1.3, including:


Hardware view

Logical view: communication between processes


COPYRIGHT NOTICE:

Copyright (C) 2007, Jurjen Kranenborg

This work is licensed under the Creative Commons Attribution-Noncommercial-Share Alike 2.5 (Swedish port).

Creative Commons License

To view a copy of this license, you may press on the logo. You may alternatively also visit http://creativecommons.org/licenses/by-nc-sa/2.5/se To view a translation of this license in English, visit: http://creativecommons.org/licenses/by-nc-sa/2.5 or send a letter to Creative Commons, 171 Second Street, Suite 300, San Francisco, California, 94105, USA.

In short form (me, my = holder of copyright):

In order to acknowledge Jurjen Kranenborg (i.e. not the copyright holder of any derived work) as the architect of the original network concepts, please include the following (or similar) statement in all derived works (code, webpages, docs, etc.):

The network architecture was originally developed by Jurjen Kranenborg.


The specification document that gives a detailed description is available via the following link:

All information on the previous main release (V1.3) is still available via:


Application areas:


The software routines referred to in the specification document are availabe in this section.

Code from documented examples can be found here (Note that in V2.X the master node does not need re-programming as it roams for and registers sending slave processes itself just after network power-up!):

If the simple "diode-mixing" network of Chapter 7.3 is used (instead of the combined power+data network) , then the following variants for the network stack and applications apply. Only slave node implementations are given; the master node code is identical with the SerialPower network version. Be careful NOT to use the routines below with the original SerialPower slave hardware (i.e. combined power and data), as this will destroy the network intefrace circuit due to different polarities. Furthermore, the implementations below assume separate network input and output pins.


The list below gives a more detailed overview of features of the network: